/*******************************************************************************
  LAN8770 definitions

  Company:
    Microchip Technology Inc.
    
  File Name:
    drv_extphy_lan8770.h

  Summary:
    LAN8770 definitions

  Description:
    This file provides the LAN8770 definitions.

*******************************************************************************/
// DOM-IGNORE-BEGIN
/*
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*/

// DOM-IGNORE-END

#ifndef _LAN_8770_H_

#define _LAN_8770_H_

typedef enum
{
    /*
    // basic registers, accross all registers: 0-1
    PHY_REG_BMCON       = 0,
    PHY_REG_BMSTAT      = 1,

    // extended registers: 2-15
    PHY_REG_PHYID1      = 2,
    PHY_REG_PHYID2      = 3,
    */
    LAN8770_REG_MS_CTRL             = 9,
    LAN8770_REG_MS_STAT             = 10,

    // specific vendor registers:   16-31
    LAN8770_REG_MDIO_CTRL2          = 16,
    LAN8770_REG_MODE_STAT           = 17,
    LAN8770_REG_EXT_REG_CTRL        = 20,
    LAN8770_REG_EXT_REG_RD_DATA     = 21,
    LAN8770_REG_EXT_REG_WR_DATA     = 22,
    LAN8770_REG_PCS_CTRL            = 23,
    LAN8770_REG_INT_SOURCE          = 24,
    LAN8770_REG_INT_MASK            = 25,
    LAN8770_REG_PWR_DOWN_CTRL       = 26,
    LAN8770_REG_PCS_RX_ERR_CNT_STS  = 30,

}LAN8770_VENDOR_REG;


// extended registers
//

typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t                    : 8;
        uint16_t ADV_1000_BASE_T_HD : 1;
        uint16_t ADV_1000_BASE_T_FD : 1;
        uint16_t PORT_TYPE          : 1;
        uint16_t MS_CONFIG_VALUE    : 1;
        uint16_t MS_CONFIG_ENABLE   : 1;
        uint16_t TEST_MODE          : 3;
    };
}LAN8770_MS_CTRL_bits_t; // reg 9: LAN8770_REG_MS_CTRL


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t IDLE_ERR_CNT       : 8;
        uint16_t                    : 2;
        uint16_t LP_1000BASE_T_HD   : 1;
        uint16_t LP_1000BASE_T_FD   : 1;
        uint16_t REM_RECV_STATUS    : 1;
        uint16_t LCL_RECV_STATUS    : 1;
        uint16_t MS_CONFIG_RES      : 1;
        uint16_t MS_CONFIG_FAULT    : 1;
    };
}LAN8770_REG_MS_STAT_bits_t; // reg 9: LAN8770_REG_MS_STAT

// vendor registers
//


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t            : 12;
        uint16_t SLEEP_REQ  : 1;
        uint16_t WAKE_REQ   : 1;
        uint16_t            : 2;
    };
}LAN8770_REG_MDIO_CTRL2_bits_t; // reg 16: LAN8770_REG_MDIO_CTRL2


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t LINK_UP        : 1;
        uint16_t                : 2;
        uint16_t DSCR_LOCK_STAT : 1;
        uint16_t                : 2;
        uint16_t ENERGY_STAT    : 1;
        uint16_t                : 9;
    };
}LAN8770_REG_MODE_STAT_bits_t; // reg 17: LAN8770_REG_MODE_STAT



typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t REG_ADDRESS    : 8;
        uint16_t REG_BANK       : 3;
        uint16_t WRITE_CTRL     : 1;
        uint16_t READ_CTRL      : 1;
        uint16_t                : 3;
    };
}LAN8770_REG_EXT_REG_CTRL_bits_t; // reg 20: LAN8770_REG_EXT_REG_CTRL


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t READ_DATA  : 16;
    };
}LAN8770_REG_EXT_REG_RD_DATA_bits_t; // reg 21: LAN8770_REG_EXT_REG_RD_DATA

typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t WRITE_DATA  : 16;
    };
}LAN8770_REG_EXT_REG_WR_DATA_bits_t; // reg 22: LAN8770_REG_EXT_REG_WR_DATA

typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t                    : 7;
        uint16_t POL_FLIP_MAN_CTRL  : 1;
        uint16_t POL_FLIP_TX_CTRL   : 1;
        uint16_t POL_FLIP_RX_CTRL   : 1;
        uint16_t                    : 6;
    };
}LAN8770_REG_PCS_CTRL_bits_t; // reg 23: LAN8770_REG_PCS_CTRL


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t ENERGY_ON_INT          : 1;
        uint16_t LINK_DOWN_INT          : 1;
        uint16_t LINK_UP_INT            : 1;
        uint16_t JABBER_DETECT_INT      : 1;
        uint16_t NEW_LINK_DETECT_INT    : 1;
        uint16_t RECV_LPS_INT           : 1;
        uint16_t ENERGY_OFF_INT         : 1;
        uint16_t                        : 3;
        uint16_t RECV_WAKE_INT          : 1;
        uint16_t OVR_TEMP_INT           : 1;
        uint16_t                        : 1;
        uint16_t BER_TOGGLE             : 1;
        uint16_t WAKE_IN_INT            : 1;
        uint16_t SW_INT                 : 1;
    };
}LAN8770_REG_INT_SOURCE_bits_t; // reg 24: LAN8770_REG_INT_SOURCE

typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t ENERGY_ON_INT_MASK         : 1;
        uint16_t LINK_DOWN_INT_MASK         : 1;
        uint16_t LINK_UP_INT_MASK           : 1;
        uint16_t JABBER_DETECT_INT_MASK     : 1;
        uint16_t NEW_LINK_DETECT_INT_MASK   : 1;
        uint16_t RECV_LPS_INT_MASK          : 1;
        uint16_t ENERGY_OFF_INT_MASK        : 1;
        uint16_t                            : 3;
        uint16_t RECV_WAKE_INT_MASK         : 1;
        uint16_t OVR_TEMP_INT_MASK          : 1;
        uint16_t                            : 1;
        uint16_t BER_TOGGLE_MASK            : 1;
        uint16_t WAKE_IN_INT_MASK           : 1;
        uint16_t SW_INT_MASK                : 1;
    };
}LAN8770_REG_INT_MASK_bits_t; // reg 25: LAN8770_REG_INT_MASK


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t                    : 8;
        uint16_t HW_INIT_SEQ_ENABLE : 1;
        uint16_t                    : 7;
    };
}LAN8770_REG_PWR_DOWN_CTRL_bits_t; // reg 26: LAN8770_REG_PWR_DOWN_CTRL


typedef union
{
    uint16_t    w;
    struct
    {
        uint16_t PCS_RX_ERR_CNT : 16;
    };
}LAN8770_REG_PCS_RX_ERR_CNT_STS_bits_t; // reg 30: LAN8770_REG_PCS_RX_ERR_CNT_STS




#endif  // _LAN_8770_H_

